Basic Concepts of Software and Hardware


Key Terms & Definitions

  • Operating System (OS)

    A system-level software layer that manages hardware resources and provides common services for applications.

  • Kernel

    The core part of an OS that runs in privileged mode (Kernel Mode), handling CPU scheduling, memory, I/O, and inter-process communication.

  • User Mode vs. Kernel Mode

    Privilege separation: Kernel mode has full access to system hardware; user mode is restricted and must use system calls to request protected operations.

  • System Call

    A controlled request from a user application to the kernel to perform privileged operations, like file access or I/O.

  • Monolithic Kernel

    A design where most OS services run inside a single kernel space. This favors speed but increases system complexity and risk of failure.

  • Microkernel

    A minimal design that runs most services in user space. It improves security and modularity through message passing, though it may reduce performance.

  • Layered Structure

    An OS design organized into hierarchical layers. Higher layers depend only on those below them, enabling easier maintenance.

  • Virtual Machine (VM)

    A complete OS environment emulated by another OS, allowing software to run as if it were on native hardware.

  • Instruction Set Architecture (ISA)

    The interface between hardware and software. It defines the CPU's supported instructions, registers, and memory model.

  • RISC vs. CISC

    • RISC: Simplified, fixed-length instructions optimized for speed and pipelining.

    • CISC: Richer, complex instructions that perform more work per operation.

  • Protection Ring

    Hardware-enforced privilege levels (e.g., Ring 0 for Kernel vs. Ring 3 for Apps) to isolate untrusted code.

1. Von Neumann Model: Influence & Limitations

The Influence

The Von Neumann model laid the foundation for modern CPU design, introducing concepts we still use today:

  • Shared memory for data and instructions.

  • Dedicated registers.

  • The sequential Fetch-Execute cycle.

The Limitations

  • The Bottleneck: Data transfer speed is limited because the CPU and memory share a single bus.

  • Lack of Native Protection: It does not natively support parallelism or privilege modes; modern architectures had to add layers like pipelining and caches to compensate.

2. Architectural Trade-offs

  •  Monolithic kernels offer fast operation but are complex and harder to secure or maintain.

  • Microkernels/layered designs are more modular and secure, but inter-process messaging and context switching add overhead.

  • ISA design balances complexity: RISC simplifies CPU but requires more instructions, while CISC reduces instruction count but complicates CPU design and pipelining.

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Bus Concurrency